Víctor Soria Pardos

Ph.D. Candidate in Computer Architecture @ Universitat Politècnica de Catalunya (UPC) and Barcelona Supercomputing Center (BSC-CNS)

About Me

I earned my diploma on Computer Science from Universidad de Zaragoza (Unizar). Soon after, I started working at Barcelona Supercomputing Center (BSC-CNS) while I pursued my Master in Innovation and Research in Informatics at Universitat Politècnica de Catalunya (UPC) Currently, I am a 1st year Ph.D. student in Computer Architecture. My supervisors are Dr. Adrià Armejach from UPC/BSC-CNS, Dr. Darío Suárez from Unizar and Dr. Miquel Moretó from UPC/BSC-CNS.

My research interests include several topics of computer architecture. Specifically, my research focuses in parallel computing, compiler support, and developing microarchitectural prediction mechanisms. As side project, I collaborate in the Drac Project.

Recent News

[2023] Our paper DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations.

[2022] Our paper Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI got accepted at DSD 2022. We received the Outstanding Paper Award.

[2022] I obtained my Master in Master in Innovation and Research in Informatics

[2021] Arm has published a short blog entry about my research

[2021] Received the FPU Competitive Doctoral Fellowship by the Spanish Government after.

[2021] I participated in ACACES 2021 with a poster

Education

Universitat Politècnica de Catalunya (UPC)

Ph.D. Candidate in Computer Architecture

November 2021 - now

Supervisors: Miquel Moretó, Adrià Armejach, Darío Suárez

Universitat Politècnica de Catalunya (UPC)

Master in Innovation and Research in Informatics. Specialization in High Performance Computing

September 2019 - January 2022

Universidad de Zaragoza (Unizar)

Bachelor's Degree in Informatics Engineering

September 2015 - July 2019

One year abroad at Universitat Politècnica de Catalunya

Thesis: Characterization of HPC applications for ARM SIMD instructions

Caracterización de aplicaciones HPC para extensiones vectoriales de ARM

Professional Experience

Undergraduate Research Student @ Barcelona Supercomputing Center (BSC-CNS)

September 2018 - September 2019

Participation in Projects:
- Montblanc 2020
Characterizing OpenMP based applications

Publications

2021

[DCIS'22] DVINO: A RISC-V Vector Processor Implemented in 65nm Technology

Guillem Cabo, Gerard Candón, Xavier Carril, Max Doblas, Marc Domínguez, Alberto González, César Hernández, Víctor Jiménez, Vatistas Kostalampros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Jonnatan Mendoza, Francesco Minervini, Julián Pavón, Cristóbal Ramírez, Narcís Rodas, Enrico Reggiani, Mario Rodríguez, Carlos Rojas, Abraham Ruiz, Víctor Soria, Alejandro Suanes, Iván Vargas, Roger Figueras, Pau Fontova, Joan Marimon, Víctor Montabes, Adrián Cristal, Carles Hernández, Ricardo Martínez, Miquel Moretó, Francesc Moll, Oscar Palomar, Marco A. Ramírez, Antonio Rubio, Jordi Sacristán, Francesc Serra-Graells, Nehir Sönmez, Lluís Terés, Osman S. Unsal, Mateo Valero, Luís Villa. Conference on Design of Circuits and Integrated Systems (DCIS 2022), Pamplona.

[DSD'22] Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI

Víctor Soria Pardos, Max Doblas, Guillem López-Paradís, Gerard Candón, Narcís Rodas, Xavier Carril, Pau Fontova-Musté, Neiel Leyva, Santiago Marco-Sola, Miquel Moretó. Euromicro Conference on Digital System Design (DSD 2022), Maspalomas. [paper]

2021

[JoS'21] On the use of many-core Marvell ThunderX2 processor for HPC workloads

Víctor Soria-Pardos, Adrià Armejach, Darío Suárez, Miquel Moretó. Journal of Supercomputing 77, 3315–3338 (2021). [paper]

[DCIS'20] An academic risc-v silicon implementation based on open-source components

Jaume Abella et al. Second Young Architect Workshop (YArch 2020). Conference on Design of Circuits and Integrated Systems (DCIS 2020), Segovia. [paper]

Honors and Awards

FPU Doctoral Fellowship

Funded by Spanish Government (MINECO)

Barcelona, Spain

Duration: 2021-2024

Contact

E-mail: victorsoriapardos@gmail.com or victor.soria@bsc.es